Delay Access and Modulated Delays

Algorithm development and general DSP issues

Moderator: frank

Post Reply
johnott0010
Posts: 7
Joined: Fri Aug 30, 2019 6:25 pm

Delay Access and Modulated Delays

Post by johnott0010 » Tue Oct 08, 2019 10:51 am

First off, I would like to start by saying I’ve read through application note 1001, and the other modulated delay threads on this forum as well as most of the other resources

I’m having a hard time figuring out memory access, LFOs, and in particular demystifying the cho instruction. I’ve read the resources on the Spin website, but when I try to use it to code it doesn’t do what I think it should.

What I’m trying to do is use pot0 to control delay time, which I have successfully done on its own, but then I’m trying to use pot1 to introduce some modulation to the delay time. I’m not attempting to add chorus to the signal, I want to modulate the delay time.

How I thought this should work is utilize the LFO to alter the addr_ptr around the delay time set by pot0.

Before using any LFOs I rmpa for my delay signal and the pot controls it like planned. There are some potentiometer changing artifacts I’m still trying to take care of.

What addr pointer is used in the cho interpolation (2 lines) instruction? I write to my address pointer based on the potentiometer and I would expect the cho to pull the delay based on that pointer but I’m thinking I am incorrect in this thought process.

frank
Posts: 1193
Joined: Wed Oct 19, 2005 12:26 pm
Contact:

Re: Delay Access and Modulated Delays

Post by frank » Tue Oct 08, 2019 1:00 pm

Post code with comments describing what you expect to happen at each line. Much easier to debug.
Frank Thomson
Experimental Noize

johnott0010
Posts: 7
Joined: Fri Aug 30, 2019 6:25 pm

Re: Delay Access and Modulated Delays

Post by johnott0010 » Tue Oct 08, 2019 3:46 pm

; Attempt 1, This Doesn't Seem to Be Working, But I feel like its on the "More" right path than Attempt 2 (below)
equ input reg0
equ dSignal reg1
equ dAddr reg2
equ temp reg3
equ pot0fil reg4

; set up LFO at 0.2Hz
skp run, 1
wlds sin0, 1, 100

; pot0 is delay time
clr
rdax pot0, 1
and %01111110_00000000_00000000
sof 1, 0.05
rdfx pot0fil, 0.0005
wrlx pot0fil, -1
wrax pot0fil, 1
wrax addr_ptr, 0 ; store read address
rmpa 1 ; delay signal
wrax dSignal, 0 ; store to dSignal

; pot1 is modrate
ldax pot1 ;load pot1
sof 0.0441,0.0049 ;scale for 0.1Hz to 1Hz
wrax sin0_rate,0 ;save to sin0 rate, clear ACC

ldax adcr
wrax input, 1
rdax dSignal, 1
wra delay, 0

cho rda, sin0, sin|reg|compc, delay^
cho rda, sin0, 0, delay^+1 ; I thought this would be my modulated delay signal

;rdax dSignal, 1 ; with this commented out, I dont have my delayed signal
wrax dacl, 0 ; output modulated delay signal only (100%wet)
rdax input, 1 ; output 100% dry signal
wrax dacr, 0




; Attempt 2: I am really getting a modulated delay line on this one
; however, the audio artifacts are terrible. I'm assuming because
; I just take the address pointer and multiply it by the triangle wave
; basically. Not sure if I will be able to continue with this algorithm
; and get rid of the artifacts. Which is why I thought attempt 1 was
; more legitimate.
mem delay 8192 ; 0 - 150ms


equ triMod reg0
equ dSignal reg1
equ mPos reg2 ; flange/chorus
equ mDepth reg3
equ triOg reg4
equ fInput reg5
equ fOutput reg6
equ fil reg7 ; For Pot Smoothing
equ pot1fil reg8
equ pot0fil reg9

skp run, START
wldr rmp0, 12, 4096
rdax pot0, 1
sof 20/64, 1/64
wrax pot0fil, 0
rdax pot1, 1
wrax pot1fil, 0


START:

sof 0, 0.09 ; preset mod speed
wrax rmp0_rate, 0 ; store

rdax pot1, 1
and %01111110_00000000_00000000
rdfx pot0fil, 0.003827
wrlx pot0fil, -1
wrax pot0fil, 1
wrax mDepth, 0
cho rdal, rmp0
sof 1, -0.25
absa
mulx mDepth
wrax triOg, 0.017
wrax triMod, 0



rdax pot0, 1
and %01111110_00000000_00000000
sof 20/64, 1/64
rdfx pot0fil, 0.003827
wrlx pot0fil, -1
wrax pot0fil, 1
rdax triMod, 1
;rdax mPos, 1
wrax addr_ptr, 0


; read delay signal
rmpa 1
;cho rda, rmp0, reg|compc, delay+100
;cho rda, rmp0, 0, delay+101
;cho rda, rmp0, reg|compc, delay+300
;cho rda, rmp0, 0, delay+301
wrax dSignal, 0
rdax adcr,1
wra delay, 0

; filter noise on dSignal
rdax dSignal, 1
wrax fInput, -1
rdfx fil, 0.1
wrhx fil, -1
mulx 0.8
rdax fInput, 1
wrax fOutput, 0


; write outputs

rdax fOutput, 1
wrax dacl, 0
rdax adcr, 1
wrax dacr,0 ; Dry Signal

frank
Posts: 1193
Joined: Wed Oct 19, 2005 12:26 pm
Contact:

Re: Delay Access and Modulated Delays

Post by frank » Tue Oct 08, 2019 9:40 pm

Probably the best way to do this is how Aaron shows here using a delay memory block and a modulation memory block: viewtopic.php?f=3&t=761&p=4000&hilit=mo ... elay#p4002

To modulate the pointer cannot be done with a simple chorus, you would need to read the LFO with a cho rdal, scale it and add it to the calculated pointer then use the rmpa to read from the delay line. Possible but Aarons method has some advantages.
Frank Thomson
Experimental Noize

johnott0010
Posts: 7
Joined: Fri Aug 30, 2019 6:25 pm

Re: Delay Access and Modulated Delays

Post by johnott0010 » Wed Oct 09, 2019 5:30 am

Oh ok that seems simple enough.

I’ve read this thread before, but when I looked at that piece of code I thought that the delay signal was getting modulated as opposed to modulating the delay time. I’ll try this out and see if it is what I’m working towards.

Thank you

igorp
Posts: 65
Joined: Tue May 19, 2015 6:10 am
Location: RU

Re: Delay Access and Modulated Delays

Post by igorp » Fri Oct 18, 2019 4:20 pm

Are you trying to make delay and chorus in same , maximum RAM buffer?
I see no MEM directives and separate buffers for delay and chorus

Post Reply